1. Field of the Invention
This invention relates to a signal processing apparatus for filtering an input signal by performing subtraction of signal charge with the use of a charge-coupled device, and more particularly to a method for obtaining a filter of comb-shaped characteristics with good performance.
2. Description of the Related Art
A filter of comb-shaped characteristics is generally used to, for example, separate a luminance signal (hereinafter referred to as a "Y signal") and a color signal (hereinafter referred to as a "C signal") from a composite image signal.
The Y and C signals are discrete signals, and have energies in relation to frequency as shown in FIG. 1, if they are components of an NTSC composite image signal. To separate the Y and C signals from the NTSC composite signal, a signal processing apparatus as shown in FIG. 2 is generally used.
In FIG. 2, reference numerals 1 and 2 denote multiplier sections for multiplying an input signal by respective predetermined coefficients. These coefficients are determined based on control signals Vh1 and Vh2, respectively. An output from the multiplier section 1 is input to a delaying section (D)3 with a period of delay equal to one horizontal scanning period. An output from the delaying section 3 and an output from the multiplier section 2 are added to each other in an adder section 4, and an addition result is output as an output signal Vout.
When the control signals Vh1 and Vh2 have such values as enable both the coefficients of the multiplier sections 1 and 2 to be 1, the Y signal is output as the output signal Vout. Further, when the control signals Vh1 and Vh2 have such values as enable the coefficients of the multiplier sections 1 and 2 to be 1 and -1, respectively, the adder section 4 performs substantial subtraction, with the result that the C signal is output as the output signal Vout. FIG. 3 shows gain characteristics of the thus-separated Y and C signals.
Where substantial subtraction is performed by means of a charge-coupled device (hereinafter referred to as a "CCD") to obtain the C signal by means of the signal processing apparatus shown in FIG. 2, the CCD has a structure as shown in FIG. 4.
In FIG. 4, reference numeral 11 denotes a first input/transfer section (hereinafter referred to as a "first CCD") which includes the input section of an input signal Vin, the multiplier section 1, and the delaying section 3, reference numeral 12 a second input/transfer section (hereinafter referred to as a "second CCD") which includes the input section of the signal Vin, and part of the multiplier 2, reference numeral 13 an adder section for adding the signal charges of the first and second CCDs 11 and 12, reference numeral 14 an output section for extracting a signal charge, and reference numeral 31 a part of the multiplier 2.
Further, reference numeral 15 denotes the input section of the first CCD 11, reference numeral 16 the transfer section of the first CCD 11, reference numeral 17 the input section of the second CCD 12, reference numeral 18 the transfer section of the second CCD 12, reference numeral 21 a measuring electrode provided in the first CCD 11 for measuring the charge of a signal, reference numeral 23 a measuring electrode provided in the second CCD 12 for measuring the charge of a signal, and reference numerals 22 and 24 input voltage applying electrodes for applying input signals.
The transfer section 18 of the second CCD 12 has a stages of transfer electrodes (.alpha.: a positive integer) controlled by two-phase clock signals .phi. 1 and .phi. 2. The transfer section 16 of the first CCD 11 has .beta. stages of transfer electrodes (.beta.: a positive integer), which are controlled by two-phase clock signals .phi. 1 and .phi. 2 to obtain a period of delay equal to one horizontal scanning period, plus .alpha. stages of transfer electrodes. The first and second CCDs 11 and 12, the adder section 13 and the output section 14 are separated by thick field insulating films formed on a semiconductor substrate, and are respectively located in diffusion regions called transfer channels.
As is shown in FIG. 4, to perform subtraction by the use of the CCD, the input coefficient of one of the first and second input sections 15 and 17 must be -1. FIG. 4 shows an example in which the input signal Vin is input to the second input section 17 after it is inverted by means of an inverting circuit 31.
The inverting circuit 31 may be provided outside an IC as shown in FIG. 5, or inside the same as shown in FIG. 6.
In the case of FIG. 5, it is necessary to construct the inverting circuit 31 by means of an external component, and also to employ an input terminal 32 for receiving an inverted signal. In the case of FIG. 6, the inverting circuit 31 generally consists of a MOS transistor which can be easily formed on a substrate, together with CCD elements. FIG. 7 shows an example of a MOS transistor inverting circuit.
In both the cases of FIGS. 5 and 6, however, it is difficult in view of variations in process to construct the inverting circuit 31 such that it always has a gain of 0 dB. Accordingly, a gain difference occurs between the input signals of the first and second input sections 15 and 17, thus providing shallow comb-shaped characteristics. As a result, good separation of the Y and C signals is hard to perform.
The conventional signal processing apparatus has further drawbacks as follows:
i) Where an input signal is supplied to two terminals, and only a signal supplied to an inverting terminal (i.e. the inverting circuit 31) of the two terminals is inverted, there occurs a gain difference between the inverted signal and a non-inverted signal. If these signals are added to each other, good comb-shaped characteristics cannot be obtained. PA1 ii) Where a voltage is supplied to the CCD charge measuring electrode from the outside so as to eliminate the gain difference, a particular voltage input terminal 33 is necessary, and a further cost is required to perform voltage adjustment. PA1 iii) Where the inverting circuit is provided outside the IC, it is necessary to employ the inverting-signal inputting terminal 32, which increases the cost required to construct the outside inverting circuit.